====== GPIO with interrupts ======

==== Vivado design ====

Initial Vivado design -- only Zynq + single AXI GPIO

{{:hw:zynq:gpio_interrupt:vivado_gpio_int.png?600|}}

  - Open AXI GPIO properties (double click on block), go to **IP Configuration** tab and enable **Enable Interrupt** on bottom
  - Open Zynq Processing System, go to **Interrupts** tab, enable and unfold **Fabric Interrupts**,\\ unfold **PL-PS Interrupt Port** and enable **IRQ_F2P[15:0]**
  - Draw connection from **ip2intc_irpt** port at AXI GPIO to **IRQ_F2P[0:0]** port at Zynq Processing System
  - Validate design
  - Go to **Sources** tab in Vivado and select **Create HDL Wrapper** for top cell
  - Generate bitstream
  - After bitstream is done, select **File->Export->Export Hardware** and make sure that **Include Bitstream** is checked

==== PetaLinux ====

  - Get new hardware description <code>
petalinux-config --get-hw-description <path_to_vivado_project_directory>/<project_name>.sdk/
</code>
  - Do not change anything in the config -- configuration set previously remain unchanged
  - Build kernel & boot, create ''BOOT.BIN'' image and copy it to the SD card