====== Monte Carlo analysis ======
===== AMS 3.70 =====
<code>HIT-KIT 3.70; spectra</code> \\
<code>details: file:///opt/cds/designKits/ams_v3.70/www/hitkit/circuit_sim/montecarlo/mismatch.html</code>
==== Models setting ====
To run MC simulations you must set Monte Carlo sections of elements models. \\
So run //virtuoso analog design environment// and click **setup -> model libraries**. Next change in libraries (cmos53, res, cap, etc) name of section, from *tm to *mc. For example cmostm -> cmosmc.

==== Run of simulation ====
After change the models, you run the simulation: **tools -> monte carlo** \\
Gauss distibution requiere over 30 samples. So **number of runs** should be higher than 30. To see all results, change ** save data between runs ** checkbox on true.

==== Results ====
Results as characteristic family: \\
In //setup outputs// set //data type// on //wave//. \\

Results as histograms: \\
In //setup outputs// set //data type// on //scalar//. \\


===== AMS 4.00 =====
<code>HIT-KIT 4.00; spectra</code> \\

==== Models setting ====
To run MC simulations you must set Monte Carlo sections of elements models. \\
**ICFB -> Hit-Kit Utilities -> Simulation Utilities -> Change Model Files -> Set MC models**

==== Run of simulation ====
Monte Carlo simulations are available in ADE XL. If cellview //adexl// doesn't exist: in schematic window click **Launch -> ADE XL** In dialog box choose **Create new view** and click OK (if adexl cellview exists - simple open it). \\
In toolbar **Run** change //single run...// on // Monte Carlo Sampling//. In //Simulation options// (first button on right) set method (mismatch, process or all), specified number of iterations and finally mark //Save Data to Allow Family Plots//.
Finally run the simulations (green button on **run** toolbar).

\\ \\

** Remark ** All simulations type (dc, ac, etc) and outputs are set on **Data View** in **Tests** branch.

===== Phase Margin, GBW and open loop gain =====
Due to lack of corelations between instances on test bench, it is not possible to check above parameters in the standard AC simulations on replica circuits. \\
The solution is to run MC on //stb// analysis and use following expressions to obtain histograms of DC open loop gain, phase margin and gain-bandwidth product: \\
  - DC Open loop gain: <code>dB20(value(getData("loopGain" ?result "stb") 0))</code>
  - Phase Margin: <code>getData("/phaseMargin" ?result "stb_margin")</code>
  - GainBandWidth: <code>getData("/phaseMarginFreq" ?result "stb_margin")</code>