EXTERNAL PORTS
These are the external ports defined in the MHS file.
Attributes Key The attributes are obtained from the SIGIS and IOB_STATE parameters set on the PORT in the MHS file CLK  indicates Clock ports, (SIGIS = CLK)  INTR  indicates Interrupt ports,(SIGIS = INTR)  RESET  indicates Reset ports, (SIGIS = RST)  BUF or REG  Indicates ports that instantiate or infer IOB primitives, (IOB_STATE = BUF or REG)
# NAME DIR [LSB:MSB] SIG ATTRIBUTES 0GLB fpga_0_FLASH_8Mx16_adv_dummy_pin O 1 net_gnd 1GLB fpga_0_FLASH_8Mx16_byte_dummy_pin O 1 net_vcc 2GLB fpga_0_FLASH_8Mx16_clk_dummy_pin O 1 net_vcc 3GLB fpga_0_FLASH_8Mx16_rpn_dummy_pin O 1 net_vcc 4GLB fpga_0_FLASH_8Mx16_wait_dummy_pin O 1 net_gnd 5A fpga_0_DDR2_SDRAM_16Mx32_DDR2_DQ IO 31:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_DQ 6A fpga_0_DDR2_SDRAM_16Mx32_DDR2_DQS IO 3:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_DQS 7A fpga_0_DDR2_SDRAM_16Mx32_DDR2_DQS_N IO 3:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_DQS_N 8A fpga_0_DDR2_SDRAM_16Mx32_DDR2_A_pin O 12:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_A 9A fpga_0_DDR2_SDRAM_16Mx32_DDR2_BA_pin O 1:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_BA 10A fpga_0_DDR2_SDRAM_16Mx32_DDR2_CAS_N_pin O 1 fpga_0_DDR2_SDRAM_16Mx32_DDR2_CAS_N 11A fpga_0_DDR2_SDRAM_16Mx32_DDR2_CKE_pin O 1 fpga_0_DDR2_SDRAM_16Mx32_DDR2_CKE 12A fpga_0_DDR2_SDRAM_16Mx32_DDR2_CK_N_pin O 1:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_CK_N 13A fpga_0_DDR2_SDRAM_16Mx32_DDR2_CK_pin O 1:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_CK 14A fpga_0_DDR2_SDRAM_16Mx32_DDR2_CS_N_pin O 1 fpga_0_DDR2_SDRAM_16Mx32_DDR2_CS_N				# NAME DIR [LSB:MSB] SIG ATTRIBUTES 15A fpga_0_DDR2_SDRAM_16Mx32_DDR2_DM_pin O 3:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_DM 16A fpga_0_DDR2_SDRAM_16Mx32_DDR2_ODT_pin O 0:0 fpga_0_DDR2_SDRAM_16Mx32_DDR2_ODT 17A fpga_0_DDR2_SDRAM_16Mx32_DDR2_RAS_N_pin O 1 fpga_0_DDR2_SDRAM_16Mx32_DDR2_RAS_N 18A fpga_0_DDR2_SDRAM_16Mx32_DDR2_WE_N_pin O 1 fpga_0_DDR2_SDRAM_16Mx32_DDR2_WE_N 19B fpga_0_FLASH_8Mx16_Mem_DQ_pin IO 0:15 fpga_0_FLASH_8Mx16_Mem_DQ 20B fpga_0_FLASH_8Mx16_Mem_CEN_pin O 0:0 fpga_0_FLASH_8Mx16_Mem_CEN 21B fpga_0_FLASH_8Mx16_Mem_OEN_pin O 0:0 fpga_0_FLASH_8Mx16_Mem_OEN 22B fpga_0_FLASH_8Mx16_Mem_WEN_pin O 1 fpga_0_FLASH_8Mx16_Mem_WEN 23C fpga_0_FLASH_8Mx16_Mem_A_pin O 7:31 fpga_0_FLASH_8Mx16_Mem_A 24D fpga_0_LEDs_8Bit_GPIO_d_out_pin O 0:7 fpga_0_LEDs_8Bit_GPIO_d_out 25E fpga_0_RS232_RX_pin I 1 fpga_0_RS232_RX 26E fpga_0_RS232_TX_pin O 1 fpga_0_RS232_TX 27F sys_clk_pin I 1 dcm_clk_s  CLK  28G sys_rst_pin I 1 sys_rst_s  RESET